Design of a high-voltage rail-to-rail error amplifier based on standard CMOS used in an LDO

  • This paper presents the design of a high-voltage (HV) rail-to-rail error amplifier. This circuit controls the output signal of a low drop-out voltage regulator (LDO) according to the reference voltages and based on stacked standard transistors. The circuit is designed using 65 nm CMOS process technology with a nominal voltage of 2.5 V and is optimized for arbitrary values of supply voltage up to 5.0 V. The error amplifier consists of 3 stages and 2 feedback loops. The stages are internally connected rail-to-rail to achieve high GBW and DC accuracy. The simulation and measurement results for the designed HV-error amplifier show that the output signal of the LDO tracks the reference voltages. The circuit design is technology-independent and compatible with scaled CMOS.

Export metadata

Additional Services

Search Google Scholar
Metadaten
Author: Sara Pashmineh, Dirk Killat, Stefan Bramburger
URL:http://ieeexplore.ieee.org/document/7726693/
DOI:https://doi.org/10.1109/CCECE.2016.7726693
ISBN:978-1-4673-8721-7
ISBN:978-1-4673-8722-4
Title of the source (English):2016 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE, 15-18 May 2016
Publisher:IEEE
Place of publication:Piscataway, NJ
Document Type:Conference Proceeding
Language:English
Year of publication:2016
First Page:1
Last Page:5
Faculty/Chair:Fakultät 1 MINT - Mathematik, Informatik, Physik, Elektro- und Informationstechnik / FG Mikroelektronik
Einverstanden ✔
Diese Webseite verwendet technisch erforderliche Session-Cookies. Durch die weitere Nutzung der Webseite stimmen Sie diesem zu. Unsere Datenschutzerklärung finden Sie hier.