Using Emulation Software to Predict the Performance of Algorithms on NVRAM

  • Currently, new storage technologies which unite the latency and byte-addressability of DRAM with the persistence of disks are being developed. This non-volatile memory (NVRAM) may start a software revolution. Traditionally, software was developed for two levels of storage and NVRAM reduces the hierarchy to a single-level store. Current research projects are already exploring the potential of NVRAM, but they face a challenge when they want to evaluate the performance: The new hardware is not yet available. In this paper, we discuss why benchmark results which are gained on existing DRAM are insufficient for a prediction of the performance on NVRAM. Either existing instructions have to be changed or new ones have to be introduced. We further show that the bochs emulator can be used to build systems which resemble NVRAM, to predict the NVRAM's consequences, and it even allows a comparison of algorithms for NVRAM.

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Metadaten
Author: Jana Traue, Jörg Nolte, Philipp Engel, Reinhardt KarnapkeORCiD
DOI:https://doi.org/10.4108/icst.simutools.2014.254796
ISBN:978-1-63190-007-5
Title of the source (English):Proceedings of the 7th International ICST Conference on Simulation Tools and Techniques, SIMUTools '14
Publisher:ICST
Place of publication:Brüssel
Document Type:Conference publication peer-reviewed
Language:English
Year of publication:2014
Tag:Emulation; non-volatile memory
First Page:142
Last Page:146
Faculty/Chair:Fakultät 1 MINT - Mathematik, Informatik, Physik, Elektro- und Informationstechnik / FG Verteilte Systeme und Betriebssysteme
Institution name at the time of publication:Fakultät für Mathematik, Naturwissenschaften und Informatik (eBTU) / LS Verteilte Systeme / Betriebssysteme
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